IIT Guwahati and Tata Electronics sign MoU for a chip-packaging centre of excellence and ATMP degree programmes
IIT Guwahati and Tata Electronics will set up a Centre of Excellence in semiconductor assembly, testing, marking and packaging, along with diploma and BTech programmes, to train talent for chip plants such as Tata's Jagiroad facility.
IIT Guwahati and Tata Electronics have signed a memorandum of understanding (MoU) to set up a Centre of Excellence for semiconductor assembly, testing, marking and packaging (ATMP) on the institute's campus. They will also create diploma and BTech-level programmes in the field. According to reports, the MoU was signed on 30 October 2026 by Prof. Rohit Sinha for IIT Guwahati and Ranjan Bandyopadhyay for Tata Electronics.
The agreement is a direct answer to the one shortage every Indian chip project keeps running into: people trained to run the plants.
What the partnership covers
According to reports of the MoU, the collaboration has several parts:
- A Centre of Excellence in ATMP at IIT Guwahati, focused on semiconductor packaging education, skill development and research.
- New academic programmes at both diploma and BTech level in ATMP. IIT Guwahati will lead the design and delivery of the courses, and Tata Electronics will help develop course content and training modules.
- Faculty training and joint course development, so teaching keeps pace with the processes in use on the factory floor.
- Student training opportunities at Tata Electronics.
- Joint research in semiconductor packaging.
- Wider reach through partner colleges, universities and polytechnics, which the two sides will identify to bring the training to more students.
Details such as intake size, course length and when admissions open have not been announced.
Why Guwahati, and why now
The location is no accident. Tata Electronics is building a semiconductor assembly and test plant at Jagiroad in Assam's Morigaon district, east of Guwahati. At an investment of about ₹27,000 crore, it is a major planned semiconductor assembly and test facility. The plant will need thousands of technicians, process engineers and quality specialists, creating demand for specialised training in the region.
The Centre of Excellence itself will be on the IIT Guwahati campus, not at Jagiroad. But being close to the plant makes internships, faculty exchanges and eventual hiring much easier. IIT Guwahati's leadership has already pointed to the Tata facility as a draw for the region.
The talent problem in Indian chipmaking
India has a large pool of chip design engineers. Many of the world's biggest semiconductor companies run major design centres in Bengaluru, Hyderabad and Noida. Manufacturing is a different skill set. Packaging lines need people who understand wafer dicing, die attach, wire bonding and flip-chip processes, moulding, thermal management, reliability testing and statistical process control. They also need technicians who can keep expensive equipment running around the clock.
Industry reports this year have pointed out that India's new OSAT plants still lean heavily on foreign engineers and partners. Programmes like this one aim to change that over time. The diploma track matters as much as the BTech: much of the workforce on a packaging line is technicians, not graduate engineers.
What to watch
The real measure of the MoU will be how many trained graduates and technicians it turns out, and how quickly. Key markers will be the launch date and intake of the first diploma and BTech cohorts, the equipment installed at the Centre of Excellence, and whether students end up on the Jagiroad line. If it works, it could become a template for pairing other Indian chip plants with nearby institutes.
Sources
- https://digitallearning.eletsonline.com/2026/10/iit-guwahati-tata-electronics-semiconductor-atmp-centre-of-excellence/
- https://www.nktv.in/iit-guwahati-to-introduce-diploma-btech-courses-in-semiconductor-technology-through-tata-electronics-partnership/
- https://thenewsmill.com/2026/10/iit-guwahati-tata-electronics-tie-up-for-semiconductor-training/
- https://evertiq.com/design/2026-11-02-iit-guwahati-tata-electronics-to-advance-chip-packaging-research
- https://en.wikipedia.org/wiki/Tata_Semiconductor_Assembly_and_Test
- https://www.crnasia.com/india/news/2026/tata-electronics-races-to-build-india-s-full-semiconductor-stack-through-ecosystem-partnerships
- https://www.icicidirect.com/research/equity/trending-news/l-t-semiconductor-shifts-osat-to-india-partners-tata-electronics
- https://www.digitimes.com/news/a20261007VL204/india-government-osat-packaging-plant.html